1. Field of the Invention
This invention relates to a Skip Count Clock Generator.
2. Description of the Prior Art
When multiple frequencies of clock pulses are required for a given device, a common approach has been to obtain a variable frequency generator which is subsequently tuned to the desired frequency. However, the relatively high cost of variable frequency generators makes them economically impractical for accompanying mass produced devices using different frequencies.
A practical solution to the multiple clock frequency generation problem was presented by C. E. Lenz in his patent entitled, Digital Reference Source, U.S. Pat. No. 3,378,692, patented Apr. 16, 1968. Lenz's device generates different clock frequencies from a master clock frequency generator using a counter to determine when the output wave form should rise and fall. However, Lenz limited his circuit's variability to the generation of simple fractions (1/2, 1/3, 1/4, 1/5, etc.) of the master clock. In contrast, the applicant's invention allows its user to select the number of clock pulses to be skipped (one of 5, 3 of 7, etc.) so a desired fractional frequency may be obtained from the master clock frequency generator.
A patent to J. D. Bagley entitled, Variable Pattern Pulse Generator, U.S. Pat. No. 3,198,358, patented July 20, 1965, made multiple clock pulse frequencies of varying fractions available to his circuit's user. Unlike the applicant's device, though, the Bagley invention incorporated delay feedback loop circuits which were uniquely constructed to delay generator clock pulses a predetermined multiple of pulse periods before those remaining pulses reached the invention's output. These delayed devices were combined with bistable flip-flop circuits to produce a recurrent pulse pattern of predetermined pulses and blank positions. The applicant's device employs no delay feedback loops which require reconstruction for different frequencies nor are bi-stable flip-flops used to generate desired base frequency fractions. Instead, a presettable, reset counter and skip logic circuitry are gated with the base frequency generator so an operator can quickly and easily set the counter and skip number for a chosen base frequency fraction. Also, the absence of delaying circuitry allows the leading and trailing pulse edges to be transmitted in a substantially unaltered fashion.
Other approaches to pulse skipping have appeared in timing circuits where an output pulse at a specific instant was required to initiate a required response. However, these devices were not intended to generate multiple clock frequencies.